MIL and SIL and PIL tests for MPPT algorithm. Issue 1 (1st January 2017)

• Record Type: Journal Article
• Authors: Motahhir, Saad; El Ghzizal, Abdelaziz; Sebti, Souad; Derouich, Aziz
• Editors: Meng, Wei
• Is Part Of: Cogent engineering. Volume 4:Issue 1(2017)
• Publication Date: 2017-01-01
• Subjects: automatically generated code -- boost -- model in the loop -- photovoltaic panel -- processor in the loop -- software in the loop -- variable step-size incremental conductance -- V-cycle; Engineering -- Periodicals; Technology -- Periodicals; Engineering; Technology; Periodicals; 620
• DOI: 10.1080/23311916.2017.1378475
• Languages: English
• ISSNs: 2331-1916

Abstract

Abstract: This paper presents guidelines to develop the Maximum Power Point Tracking controller, as developed in the automotive and aeronautical applications, this by following the V-cycle development process, which means that our controller will be validated by using Model In the Loop/ Software In the Loop/Processor In the Loop tests. In order to have the possibility of integrating the MPPT embedded software in automotive and aeronautical areas, and on the other hand to propose a low-cost option to test the hardware implementation of the MPPT algorithm. Therefore, a modified variable step Incremental Conductance algorithm is proposed in this study, which can reduce the steady-state oscillations and increase the tracking speed under sudden irradiance variation. Then, the Model-based design of the modified algorithm is developed and connected to the plant model (photovoltaic panel and Boost converter). Next, the system model is tested and validated by using Model In the Loop process. After that, the software of this algorithm is automatically generated for the host computer using embedded coder tool, and this software is connected to the plant model and tested using Software in the Loop process in the host computer. Finally, the software is generated from the MPPT model for the STM32F4 discovery board in order to create the Processor In the Loop block, which will be run in the STM32F4 discovery board, and the plant model will be simulated in the host computer, and the ST-LINK communication is used in order to connect the host computer and the embedded board.