100 Gb/s all-optical multifunctional AND, NOR, XOR, OR, XNOR, and NAND logic gates in a single compact scheme based on semiconductor optical amplifiers. (May 2021)

• Record Type: Journal Article
• Authors: Kotb, Amer; Guo, Chunlei
• Is Part Of: Optics & laser technology. Volume 137(2021)
• Publication Date: 2021-05
• Subjects: Optical logic functions -- Semiconductor optical amplifiers -- Optical interferometers; Optics -- Periodicals; Lasers -- Periodicals; Electronic journals; 621.366
• DOI: 10.1016/j.optlastec.2020.106828
• Languages: English
• ISSNs: 0030-3992

Abstract

Highlights: Six basic logic Boolean functions are performed in a compact scheme based on SOAs at 100 Gb/s. Better values of QF, ER, and CR are obtained using few hardware resources. The proposed compact scheme will have a series of optical domain applications. Abstract: Recently, the need for optical signal processing with high information capacity and low cost is rapidly increasing while Boolean functions handled by single-function logic gates are very limited and high cost. Therefore, we overcome the single-function limitation by investigating through means of theoretical analysis the performance of all-optical multifunctional six basic logic gates, AND, NOR, XOR, OR, XNOR, and NAND, for the first time using the nonlinearity properties of cross-phase modulation in a single compact scheme based on few semiconductor optical amplifiers (SOAs) at a data rate of 100 Gb/s acceptable. The AND and XOR logic gates are performed using SOAs-assisted Mach-Zehnder interferometers while the NOR logic gate is performed using a single SOA followed by a delayed interferometer. Then three additional logic gates, OR, XNOR, and NAND, are performed by the combination of the outcomes of the AND, XOR, and NOR logic gates. The performance of the considered functions is evaluated by three metrics, i.e. quality factor, extinction ratio, and contrast ratio. The achieved results confirm that six basic logic functions can be executed with acceptable performance using the proposed compact scheme at 100 Gb/s.