Monolithic Integrated AlGaN/GaN Power Converter Topologies on High‐Voltage AlN/GaN Superlattice Buffer. Issue 3 (30th September 2020)

• Record Type: Journal Article
• Authors: Moench, Stefan; Müller, Stefan; Reiner, Richard; Waltereit, Patrick; Czap, Heiko; Basler, Michael; Hückelheim, Jan; Kirste, Lutz; Kallfass, Ingmar; Quay, Rüdiger; Ambacher, Oliver
• Other Names: Hammar Mattias guestEditor.; Hallén Anders guestEditor.; Lourdudoss Sebastian guestEditor.
• Is Part Of: Physica status solidi. Volume 218:Issue 3(2021)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2020-09-30
• Subjects: gallium nitride -- high-electron-mobility transistors -- monolithic integrated circuits -- power integrated circuits -- semiconductor superlattices -- substrates; Solid state physics -- Periodicals; Solids -- Industrial applications -- Periodicals; 530.41
• DOI: 10.1002/pssa.202000404
• Languages: English
• ISSNs: 1862-6300

Abstract

Abstract : A high‐voltage AlN/GaN superlattice (SL) buffer for monolithic AlGaN/GaN power circuits is experimentally compared with a step‐graded AlGaN/GaN buffer. The SL as part of a 5.1 μm epitaxial stack withstands over 1.3 kV. Although the step‐graded buffer is sufficient for low‐side circuits, the operation voltage of monolithic topologies such as a half‐bridge is limited: static negative back gating at −200 V depletes the lateral channel completely. Asymmetrical buffer leakage at a positive substrate voltage of +250 V limits the operation voltage further. The SL buffer mitigates both effects: a negative substrate voltage of −200 V reduced the lateral channel current only by 25%. However, this condition is not required for half‐bridge operation on the SL, because low symmetrical vertical buffer leakage at substrate voltages of ±500 V allows operation of power topologies with positive substrate bias. High‐electron‐mobility transistors (HEMTs) on the graded buffer show excessive threshold voltage shift at negative substrate bias. On the SL buffer, the threshold voltage is shifted only +1 V from negative substrate biases, which allows monolithic high‐voltage power topology operation. 98.8% efficient operation of a 6 × 4 mm 2 GaN‐on‐Si power integrated circuit with a monolithic half bridge, freewheeling diodes, and drivers is demonstrated on the SL. Abstract : Lateral GaN‐on‐Si devices on an AlN/GaN superlattice buffer are experimentally compared with a realization on a step‐graded AlGaN/GaN buffer. The superlattice buffer shows significantly reduced static back‐gating effects and low symmetrical vertical buffer leakage. This allows operation of monolithic integrated power topologies in a single GaN‐on‐Si chip at high‐voltages. A monolithic half bridge with drivers is fabricated and operated thereon.