Topographic Complexities and Solutions for High Density BEOL MIM Capacitors. (1st August 2017)

• Record Type: Journal Article
• Authors: Cheng, Lili; Kakita, Shinichiro; Fox, Robert; Motoyama, Emiko; Lee, Jusang; Azad, Nabil; Hart, Gregory; Ham, Sun; Sharma, Ankur; Beaudoin, Felix; Zhang, Galor Wenyi; de la Garza, Ernesto Gene; Babighian, Pietro; Wang, Tao; Yang, Xiaoming; Augur, Rod; Tang, Teck Jung
• Is Part Of: ECS transactions. Volume 80:Number 4(2017)
• Page Start: 233
• Page End: 237
• Publication Date: 2017-08-01
• Subjects: Electrochemistry -- Periodicals; Electrochemistry; Periodicals; Electronic journals; Electronic journal; 541.37
• DOI: 10.1149/08004.0233ecst
• Languages: English
• ISSNs: 1938-5862

Abstract

Abstract : The BEOL compatible on-chip MIM capacitors have natural topography post MIM processing. In foundry manufacturing, design-related non uniform pattern density combined with MIM processing can lead to localized topographic process weak points. These weak points add further complexity and reduce the process window available to accommodate both MIM capacitors and Cu interconnections. The related fail modes include punch-through of MIM capacitors, un-landed Cu interconnection vias, and shorted Cu lines above the MIM capacitors. These challenges and complexities are described and characterized in this paper, as well as experiments and solutions to overcome these challenges. Manufacturing capability of BEOL MIM capacitors with capacitance density >20fF/μm 2, leakage current density <100nA/cm 2, and breakdown voltage > 5V has been demonstrated.