Dislocation Compensation in a Metamorphic Semiconductor Heterostructure Utilizing a Uniform or Graded Buffer Layer. (3rd July 2019)

• Record Type: Journal Article
• Authors: Kujofsa, Tedi; Islam, Md Tanvirul; Ayers, John E
• Is Part Of: ECS transactions. Volume 92:Number 6(2019)
• Page Start: 25
• Page End: 29
• Publication Date: 2019-07-03
• Subjects: Electrochemistry -- Periodicals; Electrochemistry; Periodicals; Electronic journals; Electronic journal; 541.37
• DOI: 10.1149/09206.0025ecst
• Languages: English
• ISSNs: 1938-5862

Abstract

Abstract : Semiconductor device structures are often grown metamorphically on lattice-mismatched substrates using intermediate buffer layers to accommodate the lattice mismatch and reduce the threading dislocation density. These structures have traditionally been designed empirically but this may not yield the optimum structure in terms of threading dislocation density. Recently advancements in the understanding of dislocation dynamics have made it possible in principle to design the buffer layer and device structure so that all glissile threading dislocations in the buffer layer are diverted at the interface for the creation of misfit dislocations. In this paper we present a criterion for the complete removal of threading dislocations from the surface of a device structure on a buffer layer by this mechanism of dislocation compensation, and we discuss its practical application.