(Invited) Technology Options to Reduce Contact Resistance in Nanoscale III-V MOSFETs. (31st March 2015)

• Record Type: Journal Article
• Authors: Lee, Rinus T.P.; Loh, Wei Yip; Tieckelmann, Robert; Orzali, Tommaso; Huffman, Craig; Vert, Alexey; Huang, Gensheng; Kelman, Maxim; Karim, Zia; Hobbs, Chris; Hill, Richard J.W.; Papa Rao, S.S.
• Is Part Of: ECS transactions. Volume 66:Number 4(2015)
• Page Start: 125
• Page End: 134
• Publication Date: 2015-03-31
• Subjects: Electrochemistry -- Periodicals; Electrochemistry; Periodicals; Electronic journals; Electronic journal; 541.37
• DOI: 10.1149/06604.0125ecst
• Languages: English
• ISSNs: 1938-5862

Abstract

Abstract : III-V semiconductors have emerged as the leading candidate to replace Si as the n-FET channel material for future low power logic applications. However, to realize the full performance benefits of III-V channels, it is crucial that external parasitic resistance (Rext ) be minimized. Among the different components of Rext, contact resistance ( RC ), between metal and source/drain (S/D) junctions, has become the critical focus. Historically, multi-layered Au-based contacts (e.g. Au/Ge/III-V) are used in III-V processing to lower RC . However, the renewed interest in III-V semiconductors has attracted an increasing interest in developing Au-free contacts to III-V with low RC . In addition, a "silicide-like" metal contact process for III-V was recently developed by reacting Ni with InGaAs to form Ni-InGaAs. This is significant as it enables self-alignment and offers the option of using a common S/D contact metal in a hetero-integrated device flow (e.g. Ge/III-V). In this paper, we will review these RC reduction options and present some of our recent results on contact/junction engineering to lower RC in III-V MOSFETs.