A New Method to Induce Tensile Stress in Silicon on Insulator Substrate: From Material Analysis to Device Demonstration. (31st March 2015) - Maitrejean, Sylvain; Loubet, Nicolas; Augendre, Emmanuel; Morin, Pierre Francois; Reboh, Shay; Bernier, Nicolas; Wacquez, Romain; Lherron, Benoit; Bonnevialle, Aurore; Liu, Qing; Hartmann, Jean-Michel; He, Hong; et al.
Abstract : Here, we demonstrate a new process to fabricate tensily strained Si On Insulator substrates (sSOI). The process is based on the epitaxial growth of Si1-x Gex on SOI substrate, the partial amorphization and crystallization of the Si / Si1-x Gex bilayers and the selective removal of the top Si1-x Gex film. Si tensile stress higher than 1.4 GPa is obtained. Complementary Metal Oxide Semiconductor Fully Depleted- SOI (CMOS FD-SOI) devices at 14 nm node design rules were fabricated on top of such substrate. For nFET devices, improvement in mobility is demonstrated with respect to devices built on standard SOI substrates.