(Invited) Record-Performance In(Ga)As MOSFETS Targeting ITRS High-Performance and Low-Power Logic. (31st March 2015)

• Record Type: Journal Article
• Authors: Rodwell, Mark J; Huang, Cheng-Ying; Lee, Sanghoon; Chobpattana, Varistha; Thibeault, Brian; Mitchell, William; Stemmer, Susanne; Gossard, Arthur
• Is Part Of: ECS transactions. Volume 66:Number 4(2015)
• Page Start: 135
• Page End: 140
• Publication Date: 2015-03-31
• Subjects: Electrochemistry -- Periodicals; Electrochemistry; Periodicals; Electronic journals; Electronic journal; 541.37
• DOI: 10.1149/06604.0135ecst
• Languages: English
• ISSNs: 1938-5862

Abstract

Abstract : We review development of In(Ga)As-channel MOSFETs. InAs and InGaAs channels, combined with thin gate dielectrics, provide high transconductance, but off-state leakage can be high due to band-band tunneling currents. This leakage is reduced through thin 2.5-3nm channels, and through InGaAs or InP vertical field spacers in the raised source and drain. Devices with 2.7nm InAs channels and lightly-doped InGaAs source/drain spacers, at 25nm Lg, provide a record 0.5mA/µm Ion at 100nA/µm Ioff and 500mV VDD . 1 µm Lg FETs show 61mV/decade subthreshold swing at VDD =0.1 V. Targeting the LP specification, we have developed InGaAs-channel MOSFETs with lightly-doped InP wide-bandgap source/drain spacer layers. At 30nm gate length, these show a minimum 60 pA/µm Ioff, approximately 100:1 smaller than a similar device using InGaAs source/drain spacers. A FET using InP spacers, with 45 nm gate length, shows 0.15 mA/µm Ion at 1nA/µm Ioff and 500mV VDD .