Process to Form V-Grooved Trenches on Patterned Si (001) Substrates Using In Situ Selective Area Etching in a MOCVD Reactor. (1st June 2016)

• Record Type: Journal Article
• Authors: Cho, Young-Dae; Lee, In-Geun; Lee, Joo-Hee; Kim, Sun-Wook; Shin, Chan-Soo; Park, Won-Kyu; Kim, Chung-Yi; Kim, Dae-Hyun; Ko, Dae-Hong
• Is Part Of: ECS journal of solid state science and technology. Volume 5:Number 7(2016)
• Page Start: P409
• Page End: P411
• Publication Date: 2016-06-01
• Subjects: in-situ baking process -- Metal Organic Chemical Vapor Deposition -- V-grooved trench; Solid state chemistry -- Periodicals; Electronics -- Materials -- Periodicals; Electrochemistry -- Periodicals; 541.0421
• DOI: 10.1149/2.0181607jss
• Languages: English
• ISSNs: 2162-8777

Abstract

Abstract : We here introduce a novel in situ anisotropic etching process to form a V-grooved trench platform on a patterned Si (001) substrate in a metal-organic chemical vapor deposition (MOCVD) reactor. Such V-grooved trenches were realized by in situ baking of a Ga-exposed Si surface at 760°C in a H2 /AsH3 atmosphere of 160 mbar in the reactor. The anisotropic etching during this process forms V-grooves of (111)-terminated Si stems. The result is closely related to the so-called melt-back etch process on the surface of a Ga-Si bond with an AsH3 gas. Furthermore, no signature Ga-As from Si precipitation remains on the etched Si surface after the process, and trench volumes can be controlled by increasing the bake time. As a result, this process enables the formation of patterned V-grooved Si trenches, which is critical to uniformly nucleate III-V material in nano-dimensional device integration without prerequisites such as a chemical process.