A low‐phase‐noise and low‐power CMOS colpitts VCO using Gm boosting and capacitance switching techniques. Issue 1 (30th July 2020) - Pakasiri, Chatrpol; You, Jia‐Hao; Wang, Sen
Abstract: This letter presents a low‐power and low‐phase‐noise 5‐GHz VCO fabricated in a standard CMOS 0.18‐μm process. The low power dissipation was achieved by using the PMOS cross‐coupled pair and G m ‐boosting topology, and the low phase noise was obtained by adding two pairs of switched capacitor array. The VCO consumed a dc power of 2.92 mW with the supply voltage of 1 V. The measured phase noises were − 104.6 dBc/Hz and − 117.4 dBc/Hz at 1 MHz offset frequency with switched off and on capacitances, respectively, which demonstrated 12.8‐dB improvement.