Dual‐Gated MoS2 Memtransistor Crossbar Array. (6th September 2020) - Lee, Hong‐Sub; Sangwan, Vinod K.; Rojas, William A. Gaviria; Bergeron, Hadallia; Jeong, Hye Yun; Yuan, Jiangtan; Su, Katherine; Hersam, Mark C.
Abstract: Memristive systems offer biomimetic functions that are being actively explored for energy‐efficient neuromorphic circuits. In addition to providing ultimate geometric scaling limits, 2D semiconductors enable unique gate‐tunable responses including the recent realization of hybrid memristor and transistor devices known as memtransistors. In particular, monolayer MoS2 memtransistors exhibit nonvolatile memristive switching where the resistance of each state is modulated by a gate terminal. Here, further control over the memtransistor neuromorphic response through the introduction of a second gate terminal is gained. The resulting dual‐gated memtransistors allow tunability over the learning rate for non‐Hebbian training where the long‐term potentiation and depression synaptic behavior is dictated by gate biases during the reading and writing processes. Furthermore, the electrostatic control provided by dual gates provides a compact solution to the sneak current problem in traditional memristor crossbar arrays. In this manner, dual gating facilitates the full utilization and integration of memtransistor functionality in highly scaled crossbar circuits. Furthermore, the tunability of long‐term potentiation yields improved linearity and symmetry of weight update rules that are utilized in simulated artificial neural networks to achieve a 94% recognition rate of hand‐written digits. Abstract : Dual‐gated MoS2 memtransistors enable artificial synapses in a novel crossbar architecture where one gate achieves tunable learning rates and the second gate overcomes the sneak current issue that plagues conventional memristor crossbar arrays. The linear and symmetric synaptic response of dual‐gated MoS2 memtransistors is used to demonstrate efficient training of an artificial neural network for potential hardware implementation.