Continuos Time ΣΔ modulator with efficient gain compensated integrators. (October 2016)

• Record Type: Journal Article
• Authors: Gonzalez-Diaz, Victor R.; Pena-Perez, Aldo; Maloberti, Franco
• Is Part Of: Microelectronics journal. Volume 56(2016)
• Page Start: 38
• Page End: 45
• Publication Date: 2016-10
• Subjects: Sigma-delta modulators -- Analog IC design -- DC-gain -- Compensation; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2016.08.003
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: This paper presents the design of a second-order continuous time (CT) Σ Δ modulator with DC gain compensated OTA based integrators. Compared to similar solutions, this novel technique uses a simple transconductor stage to compensate for the multi-bit feedback DAC inputs in the modulator. The work details the effective compensation technique by using a negative transconductance stage that only increases a 17% of the overall Σ Δ power consumption. The compensated CT modulator is implemented in a 65 nm CMOS process and achieves a SQNR of 79.3 dB and a state-of-the-art FoM of 31 fJ/conv-level.