A configurable high resolution digital pixel readout integrated circuit with on-chip image processing. (September 2020)

• Record Type: Journal Article
• Authors: Javaid, Faraz; Rashid, Muhammad; Khan, Shafqat
• Is Part Of: Computers & electrical engineering. Volume 86(2020)
• Publication Date: 2020-09
• Subjects: Digital imaging systems -- Readout integrated circuits -- High resolution -- On-chip image processing -- Low power consumption -- Reconfiguration; Computer engineering -- Periodicals; Electrical engineering -- Periodicals; Electrical engineering -- Data processing -- Periodicals; Ordinateurs -- Conception et construction -- Périodiques; Électrotechnique -- Périodiques; Électrotechnique -- Informatique -- Périodiques; Computer engineering; Electrical engineering; Electrical engineering -- Data processing; Periodicals; Electronic journals; 621.302854
• DOI: 10.1016/j.compeleceng.2020.106720
• Languages: English
• ISSNs: 0045-7906

Abstract

Highlights: A high-resolution solution for Digital Pixel Readout Integrated Circuit. On-chip processing of advance image processing algorithms. A high frame rate as well as a high signal to noise ratio. Block level as well as system level power optimization techniques. A higher degree of reconfiguration capability. Graphical abstract: Abstract: Readout Integrated Circuits (ROICs) are used to process the signal from a detector array in amaging systems. The important performance factors for ROICs, among others, include image resolution, power consumption and reconfigurability. However, the existing ROICs target only a single or few performance parameters at a time. Furthermore, the off-chip image processing in state-of-the-art methods increases the parasitic effects. The on-chip image processing solutions have also been proposed previously, but either with a low resolution or analog processing. To overcome these issues, this article presents a high resolution and low power configurable Digital Readout Integrated Circuit (DROIC) with on-chip image processing. The proposed DROIC has been designed for a digital pixel array of 1K × 1K with 10 um pixel pitch, using 65 nm CMOS process.