Effects of grain boundary and grain orientation on electrical behavior of polycrystalline ferroelectric field effect transistor. Issue 10 (27th July 2017)

• Record Type: Journal Article
• Authors: Wang, Fang; Li, Bo; Xu, Baolei; Liu, Longfei; Ou, Yun; Tian, Li; Wang, Wei
• Is Part Of: Physica status solidi. Volume 214:Issue 10(2017)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2017-07-27
• Subjects: ferroelectric field effect transistor (FeFET) -- grain boundaries -- grain orientation -- phase field model -- polycrystalline ferroelectric films; Solid state physics -- Periodicals; Solids -- Industrial applications -- Periodicals; 530.41
• DOI: 10.1002/pssa.201700277
• Languages: English
• ISSNs: 1862-6300

Abstract

Abstract : The effects of grain boundary thickness and grain orientation on the electrical behavior of a ferroelectric field effect transistor with a polycrystalline gate are investigated using a phase field model in conjunction with the basic device equations of the field effect transistor. It is found that the grain boundary and grain orientation have a significant effect on the C–V relation curve and the output characteristic curve through the remnant polarization value and the coercive field of polycrystalline ferroelectric thin film. The grain orientation and grain boundary cause the memory window of the C – V relation curves to narrow. And the grain orientation and grain boundary have an influence on the on/off state source‐drain current, decrease their on‐off ratio of the output characteristics curves in the ferroelectric field effect transistor.