Growth and Properties of N‐Polar InN/InAlN Heterostructures. Issue 19 (14th August 2020) - Hasenöhrl, Stanislav; Dobročka, Edmund; Stoklas, Roman; Gucmann, Filip; Rosová, Alica; Kuzmík, Jan
Abstract : N‐polar InN/InAlN heterostructure growth and performance are studied on‐ and off‐axis sapphire substrates misoriented toward the m or a plane by 4°. A high In molar fraction (0.57) in the InAlN layer is chosen to reduce the lattice mismatch. InN growth on the on‐axis InAlN/sapphire system is initiated with random island formation, which coalesce at ≈10 nm thickness smearing grain boundaries. In contrast, on off‐axis sapphires, growth is defined by misorientation‐induced steps and grains remain visible even after the layer coalesces. The best electron mobility of 720 cm 2 V −1 s −1 and carrier density of ≈1.5 × 10 19 cm −3 are demonstrated on the heterostructure grown on‐axis sapphire, with InN as thin as 20 nm, even though the InN/InAlN interface root mean square roughness is ≈1.3 nm. The concentrations of screw and edge dislocations in the 20 nm thick InN grown on the on‐axis system are extracted to be 4.7 × 10 9 and 3.5 × 10 10 cm −2 . In all cases, the InN lattice is still partially strained, performing only ≈85% relaxation. Further lowering of the lattice mismatch, smoothing of the InAlN surface, and achieving semi‐insulating InAlN will provide necessary development steps toward predicted InN‐channel transistors with unprecedented performance. Abstract : Viable steps toward InN‐channel high‐electron‐mobility transistors are shown. It is suggested that an In‐rich InAlN buffer layer can reduce the density of dislocations in InN by providing lower lattice mismatch if compared with more common growth on GaN. The N‐polar InN/InAlN heterostructure demonstrates decent electron mobility of 720 cm 2 V −1 s −1 with an InN layer as thin as 20 nm.