Interface and electrical properties of buried InGaAs channel MOSFET with an InP barrier layer and Al2O3/HfO2/Al2O3 gate dielectrics. (6th December 2019)

• Record Type: Journal Article
• Authors: Li, Yue; Chen, Yonghe; Sun, Tangyou; Zhang, Fabi; Cao, Mingmin; Li, Qi; Fu, Tao; Xiao, Gongli; Liu, Yingbo; Liu, Honggang; Li, Haiou
• Is Part Of: Applied physics express. Volume 13:Number 1(2020)
• Publication Date: 2019-12-06
• Subjects: Physics -- Periodicals; Technology -- Periodicals; 621.05
• DOI: 10.7567/1882-0786/ab5acf
• Languages: English
• ISSNs: 1882-0778

Abstract

Abstract: The effects of HfO2 -Al2 O3 laminate structures on the equivalent oxide thickness (EOT), interface characteristics and leakage current properties are investigated on InP substrates. Ti and HfO2 -Al2 O3 laminate structures are introduced in the MOS capacitors, which present an approximately 1 nm EOT. Compared with the Al2 O3 /HfO2 laminate structure, the Al2 O3 /HfO2 /Al2 O3 laminate structure exhibits many advantages in border trap density, interface trap density and gate leakage current on InP substrate. The peak transconductance and drive current of buried InGaAs MOSFETs with a 0.8 nm Al2 O3 /3 nm HfO2 /0.5 nm Al2 O3 gate dielectric layer are increased by 41% and 38%, respectively, compared to that of the 3 nm Al2 O3 layered one.