Design and implementation of robust and low-cost SRAM PUF using PMOS and linear shift register extractor. (September 2020)

• Record Type: Journal Article
• Authors: Gong, Mingyang; Zhang, Haichun; Wang, Chao; Tong, Qiaoling; Liu, Zhenglin
• Is Part Of: Microelectronics journal. Volume 103(2020)
• Publication Date: 2020-09
• Subjects: Security -- SRAM PUF -- Robust -- Cryptography -- Power-up value -- PMOS -- Linear shift register extractor; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2020.104844
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: The robustness of Static random access memory (SRAM) Physical unclonable functions (PUFs) is threatened by the state change of the power-up value ( R ) at different temperatures. The voltage ramp-up time T ramp is one of the factors that can affect the stability of R . Some studies have been performed on the T ramp of commercial SRAM chips at the microsecond ( μs ) level. In this paper, a robust and low cost SRAM PUF using a p-channel metal oxide semiconductor (PMOS) as a power switch to enhance the stability of R is proposed. T ramp is as fast as 11 V/ns. The proposed SRAM PUF has a linear shift register extractor, with an extraction rate as high as 7/18 and no helper data in contrast to traditional von Neumann extractor. This chip has been fabricated using 0.11 μm ultra-low-leakage technology. The experiment results show that R becomes stable at [-40 °C, 85 °C], and a simple lightweight error correcting codes (ECC) can be used in SRAM PUF.