Low Lattice Mismatch InSe–Se Vertical Van der Waals Heterostructure for High‐performance Transistors via Strong Fermi‐Level Depinning. Issue 8 (11th May 2020)
- Record Type:
- Journal Article
- Title:
- Low Lattice Mismatch InSe–Se Vertical Van der Waals Heterostructure for High‐performance Transistors via Strong Fermi‐Level Depinning. Issue 8 (11th May 2020)
- Main Title:
- Low Lattice Mismatch InSe–Se Vertical Van der Waals Heterostructure for High‐performance Transistors via Strong Fermi‐Level Depinning
- Authors:
- Jiang, Jianfeng
Meng, Fanqi
Cheng, Qilin
Wang, Aizhu
Chen, Yuke
Qiao, Jie
Pang, Jinbo
Xu, Weidong
Ji, Hao
Zhang, Yu
Zhang, Qinghua
Wang, Shanpeng
Feng, Xianjin
Gu, Lin
Liu, Hong
Han, Lin - Abstract:
- Abstract: Contact engineering, especially at the interface between metal and 2D semiconductors, to enable high‐performance devices remains a formidable challenge due to the inevitable chemical disorder and Fermi‐level pinning at the interface. Here, the authors report the InSe–Se vertical van der Waals (vdW) heterostructures to achieve high field‐effect mobility and electrical stability in 30 nm InSe field‐effect transistor (FET), which has a low lattice mismatch of 1.1% and form 2D/2D low‐resistance contacts, creating an InSe contact interface that substantially limits chemical disorder and Fermi‐level pinning. The Se layer forms a vdW contact to prevent the damage induced by direct metallization and acts as a tunneling layer as well as a protective encapsulation layer. Using this approach, heterojunction devices with a high field‐effect mobility of ≈2500 cm 2 (V s) −1 and an excellent on‐state current of ≈10 −3 A at room temperature is achieved. Furthermore, the device field‐effect mobility degrades by only 3.46% following two months of storage time in open air, which represents the best electrical stability reported to date. In particular, the heterojunction devices exhibit a better photoresponsivity compared with InSe devices in practical application. This study provides a highly valuable strategy to improve the contact condition of metal/2D semiconductors for high‐performance, 2D‐based electronics and optoelectronics. Abstract : Contact engineering, especially at theAbstract: Contact engineering, especially at the interface between metal and 2D semiconductors, to enable high‐performance devices remains a formidable challenge due to the inevitable chemical disorder and Fermi‐level pinning at the interface. Here, the authors report the InSe–Se vertical van der Waals (vdW) heterostructures to achieve high field‐effect mobility and electrical stability in 30 nm InSe field‐effect transistor (FET), which has a low lattice mismatch of 1.1% and form 2D/2D low‐resistance contacts, creating an InSe contact interface that substantially limits chemical disorder and Fermi‐level pinning. The Se layer forms a vdW contact to prevent the damage induced by direct metallization and acts as a tunneling layer as well as a protective encapsulation layer. Using this approach, heterojunction devices with a high field‐effect mobility of ≈2500 cm 2 (V s) −1 and an excellent on‐state current of ≈10 −3 A at room temperature is achieved. Furthermore, the device field‐effect mobility degrades by only 3.46% following two months of storage time in open air, which represents the best electrical stability reported to date. In particular, the heterojunction devices exhibit a better photoresponsivity compared with InSe devices in practical application. This study provides a highly valuable strategy to improve the contact condition of metal/2D semiconductors for high‐performance, 2D‐based electronics and optoelectronics. Abstract : Contact engineering, especially at the interface between metal and 2D semiconductors, for the creation of high‐performance devices remains a formidable challenge due to the inevitable chemical disorder and Fermi‐level pinning at the interface. To address these issues, of InSe–Sevan der Waals (vdW) heterostructures are reported, which have a low lattice mismatch of 1.1%, creating an InSe contact interface that substantially limits chemical disorder and Fermi‐level pinning. … (more)
- Is Part Of:
- Small methods. Volume 4:Issue 8(2020)
- Journal:
- Small methods
- Issue:
- Volume 4:Issue 8(2020)
- Issue Display:
- Volume 4, Issue 8 (2020)
- Year:
- 2020
- Volume:
- 4
- Issue:
- 8
- Issue Sort Value:
- 2020-0004-0008-0000
- Page Start:
- n/a
- Page End:
- n/a
- Publication Date:
- 2020-05-11
- Subjects:
- contact engineering -- field‐effect transistors -- InSe -- van der Waals heterostructures
Nanotechnology -- Methodology -- Periodicals
Nanotechnology -- Periodicals
Periodicals
620.5028 - Journal URLs:
- http://onlinelibrary.wiley.com/journal/10.1002/(ISSN)2366-9608 ↗
http://onlinelibrary.wiley.com/ ↗ - DOI:
- 10.1002/smtd.202000238 ↗
- Languages:
- English
- ISSNs:
- 2366-9608
- Deposit Type:
- Legaldeposit
- View Content:
- Available online (eLD content is only available in our Reading Rooms) ↗
- Physical Locations:
- British Library DSC - 8310.049300
British Library DSC - BLDSS-3PM
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- 13881.xml