Contact engineering of single core/shell SiC/SiO2 nanowire memory unit with high current tolerance using focused femtosecond laser irradiation. Issue 9 (26th February 2020) - Lin, Luchan; Huo, Jinpeng; Peng, Peng; Zou, Guisheng; Liu, Lei; Duley, Walt W.; Zhou, Y. Norman
Abstract : Single nanowire memory unit is developed with precise contact engineering on metal–oxide–semiconductor heterojunction by using the localized plasmonic effects. Abstract : Single nanowire memory units are of particular interest in the design of high-density nanoelectronic circuits, but the performance due to weak contact state remains a major problem. In this paper, bonding between core/shell SiC/SiO2 nanowire and Au electrodes can be improved via local contact engineering with femtosecond (fs) laser irradiation. An optimized heterojunction (Au–SiO2 –SiC) is possible since plasmonic enhanced optical absorption can be localized at the metal–oxide (Au–SiO2 ) interface. Electron transport across the barrier and charge accumulation at the oxide–semiconductor (SiO2 –SiC) interface are improved in nanowire circuits. A fast and stable resistance change can be achieved after only one biasing cycle ('write') and the written state can be read/extracted at a low voltage (∼ 0.5 V). Unlike other as-built nanowire circuits, the resistance state can be retained for 10 min in the absence of external power, indicating that these devices can be used for short-term memory units. High current tolerance is also provided in the circuit by the surface oxide shell which acts to protect the inner SiC core. The current density carried by the single SiC/SiO2 nanowire circuit can be as high as ∼3 × 10 6 A cm −2 before break down, and that breakdown occurs as a two-stage process.