A comprehensive analysis of reduced switch count multilevel inverter. Issue 1 (2nd January 2020)

• Record Type: Journal Article
• Authors: Kumawat, R. K.; Palwalia, D. K.
• Is Part Of: Australian journal of electrical & electronics engineering. Volume 17:Issue 1(2020)
• Page Start: 13
• Page End: 27
• Publication Date: 2020-01-02
• Subjects: Multilevel inverter (MLI) -- reduced switch count (RSC) -- THD -- pulse width modulation -- hybrid genetic algorithm; Electrical engineering -- Periodicals; Electronics -- Periodicals; Periodicals; 621.305
• DOI: 10.1080/1448837X.2019.1693884
• Languages: English
• ISSNs: 1448-837X

Abstract

ABSTRACT: Multilevel inverters (MLIs) have been recognised to generate the voltage for power quality applications. Presently number of topological improvements have been reported in literature. In higher level stages, it requires increased number of semiconductor devices that make the topology more complex, increases the cost and reduced the reliability of system. Paper discusses the method to reduce the number of switches for increased level of MLIs. It is evident from literature that RSC-MLIs, reduces the requirement of gate circuits, reduction in size and improves the power quality. It has multiple configurations based on topology and control structures. In this study, RSC-MLI configurations have been analysed. Modified selective harmonic elimination technique has been presented to control the magnitude of input DC-link and optimal switching angles.