Effect of manufacturing technics on the microstructure and temperature-affected electrical performance of D-type latch devices. (May 2020)

• Record Type: Journal Article
• Authors: Ma, Yong; Yu, Yongjian; Lu, Jian; Zou, Qiaoyun; Zhang, Huibin
• Is Part Of: Microelectronics journal. Volume 99(2020)
• Publication Date: 2020-05
• Subjects: D-type latch device -- Manufacturing technics -- Layout structure -- Package composition -- Temperature-affected electrical performance; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2020.104757
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: In this study, the D-type latch devices with Ceramic Flat Package (CFP) and Shrink Small-Outline Package (SSOP) were tested and analyzed by experimental means. The effects of manufacturing technics on the pin structure, wire bond, chip layout design, die attach and temperature-affected electrical performance were subsequently investigated. Results show that manufacturing technics with CFP package possesses thicker special pin coatings, thicker different wire bond, stable and effective die attach compared with SSOP package. Meanwhile, the bare dies of two devices exhibit same layout structure design but different longitudinal dimensions. The temperature-affected electrical performances including voltage, current and propagation delay time reveal that the temperature sensitive parameters of CFP latch (variation about 1%) display 12 times better stability than that of SSOP latch (distinct variation about 12%) from −55 ​°C to 125 ​°C. Meanwhile, the SSOP latch displays 41.8% better switching speed and working frequency than CFP latch with similar other electrical parameters at room temperature. Highlights: ● Effects of manufacturing technics on the microstructure and temperature-affected electrical properties of D-type latches were systematically investigated. ● Microstructures concerning pins, wire bond, chip layout and die attach of CFP and SSOP latches were compared and presented various features. ● The perfect packaging and longitudinal die parameters of CFP latch guarantees its 12 times better electrical stability than SSOP latch at various temperatures. ● SSOP latch displays 41.8% better switching speed than CFP latch with similar other electrical parameters at room temperature. ● The effect mechanism of manufacturing technics on the temperature-affected electrical performance is revealed at length in this work.