A Silicon Nanowire Ferroelectric Field‐Effect Transistor. (4th March 2020)

• Record Type: Journal Article
• Authors: Sessi, Violetta; Simon, Maik; Mulaosmanovic, Halid; Pohl, Darius; Loeffler, Markus; Mauersberger, Tom; Fengler, Franz P. G.; Mittmann, Terence; Richter, Claudia; Slesazeck, Stefan; Mikolajick, Thomas; Weber, Walter M.
• Is Part Of: Advanced Electronic Materials. Volume 6:Number 4(2020)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2020-03-04
• Subjects: FeFETs -- ferroelectrics -- HZO -- multigate FETs -- nonvolatile memory -- Schottky‐barrier FETs -- silicon nanowires -- SOI substrates; Materials -- Electric properties -- Periodicals; Materials science -- Periodicals; Magnetic materials -- Periodicals; Electronic apparatus and appliances -- Periodicals; 537
• DOI: 10.1002/aelm.201901244
• Languages: English
• ISSNs: 2199-160X

Abstract

Abstract: The design and characterization of a Schottky‐type ferroelectric field‐effect transistor based on a nominally undoped silicon nanowire are reported. The nanowire transistor is fabricated by top‐down technology starting from a silicon‐on insulator wafer. A thin ferroelectric Hf0.38 Zr0.62 O2 layer is integrated via a gate‐first approach. Abrupt Schottky source/drain contacts to the undoped silicon are provided by NiSi2 formation. Two distinct nonvolatile transistor states ( programmed and erased ) are observed in correspondence to negative and positive polarization in the ferroelectric layer, delivering a memory window of ≈1.5 V and, differently to conventional ferroelectric field effect transistors, yielding an on‐current difference of up to 30%. These results are interpreted as a combination of effects, arising from the proximity of the ferroelectric layer to both the channel and the Schottky‐junction regions. The threshold voltage shift, due to a polarization field acting on the channel, adds up to a polarization field‐driven tuning of the current injection through the Schottky‐source junction. This provides a strategy for manufacturing Schottky‐type nanoscale transistors with the add‐on nonvolatile option, following a complementary metal‐oxide‐semiconductor compatible process. In particular, the device concept is of great interest for achieving nonvolatile polarity modification in reconfigurable field‐effect transistors. Abstract : A memory device featuring an intrinsic silicon nanowire channel and ferroelectric hafnium oxide in the top gate (TG)‐stack is presented. The proximity of the ferroelectric layer to the transistor channel and Schottky junctions results in a tunnel injection mechanism, which can be steered by ferroelectric switching (non‐volatile Programmed/Erased state). This opens the door for new transistor functionality and non‐volatile circuit programming.