Cross‐Point Arrays with Low‐Power ITO‐HfO2 Resistive Memory Cells Integrated on Vertical III‐V Nanowires. (11th May 2020) - Persson, Karl‐Magnus; Ram, Mamidala Saketh; Kilpi, Olli‐Pekka; Borg, Mattias; Wernersson, Lars‐Erik
Abstract: Vertical nanowires with cointegrated metal‐oxide‐semiconductor field‐effect‐transistor (MOSFET) selectors and nonvolatile resistive random access memory (RRAM) cells represent a promising candidate for fast, energy‐efficient, cross‐point memory cells. This paper explores indium‐tin‐oxide‐hafnium‐dioxide RRAM cells integrated onto arrays of indium‐arsenide (InAs) vertical nanowires with a resulting area of 0.06 µm 2 per cell. For low current operation, an improved switching uniformity over the intrinsic self‐compliant behavior is demonstrated when using an external InAs nanowire MOSFET selector in series. The memory cells show consistent switching voltages below ±1 V and a switching cycle endurance of 10 6 is demonstrated. The developed fabrication scheme is fully compatible with low‐ON‐resistance vertical III‐V nanowire MOSFET selectors, where operational compatibility with the initial high‐field filament forming is established. Due to the small footprint of a vertical implementation, high density integration is achievable, and with a measured programming energy for 50 ns pulses at 0.49 pJ, the technology promises fast and ultralow power cross‐point memory arrays. Abstract : Vertical III‐V metal‐oxide‐semiconductor field‐effect‐transistor selectors combined with low‐voltage indium‐tin‐oxide‐hafnium‐dioxide resistive random access memory cells can potentially be used to realize dense and energy‐efficient cross‐point memory arrays. With a low temperature fabrication scheme fully compatible for selector and memory cointegration, and a measured programming energy of 0.49 pJ, this paper outlines the prospect for future ultralow power nonvolatile memory implementations.