A 10‐mW 3.9‐dB NF transformer‐based V‐band low‐noise amplifier in 65‐nm CMOS. (27th February 2019)

• Record Type: Journal Article
• Authors: Yu, Yiming; Wu, Yunqiu; Zhao, Chenxi; Liu, Huihua; Ban, Yongling; Kang, Kai
• Other Names: Xu Yuehang guestEditor.
• Is Part Of: International journal of numerical modelling. Volume 33:Number 3(2020)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2019-02-27
• Subjects: CMOS -- Gm‐boosting technique -- integrated circuit (IC) -- low‐noise amplifier -- transformer -- V band; Electric networks -- Mathematical models -- Periodicals; Electronics -- Mathematical models -- Periodicals; 621.3011
• DOI: 10.1002/jnm.2576
• Languages: English
• ISSNs: 0894-3370

Abstract

Abstract: A V ‐band low‐noise amplifier (LNA) employing a Gm‐boosting technique is presented in this paper. With the transformers, which are applied between the adjacent stages, the transconductances of the following transistors are boosted. Thus, the gain of the circuit is effectively enhanced. The noise figure (NF) is also decreased with the technique. Utilizing a commercial 65‐nm CMOS technology, the LNA is demonstrated. The measurement results show that the LNA achieves a maximum gain of 17.4 dB at 57.1 GHz with 10.9‐GHz 3‐dB gain bandwidth. The measured NF of the LNA is from 3.95 dB to 4.6 dB at 53 to 64 GHz. The tested input 1‐dB gain compression point ( IP 1dB ) is −14.2 dBm at 57 GHz. The DC power consumption is only 10 mW with 1‐V power supply. The chip area is only 0.255 mm 2 with all testing pads.