A new computational method to improve the synchronization of PLLs. (3rd March 2020)

• Record Type: Journal Article
• Authors: Clarià, Francesc; Solsona, Francesc; Vilaplana, Jordi
• Is Part Of: International transactions on electrical energy systems. Volume 30:Number 6(2020)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2020-03-03
• Subjects: capacitive sensor -- PLL -- signal synchronization; Electric power -- Periodicals; Electric power systems -- Periodicals; Electrical engineering -- Periodicals; 621.3
• DOI: 10.1002/2050-7038.12373
• Languages: English
• ISSNs: 2050-7038

Abstract

Summary: Capacitive sensors are widely used in industrial, commercial, and weather telemetry applications. However, their practical usefulness is conditioned by the fidelity of the signal generated in the measurement from the physical parameter. This fidelity must be preserved through appropriate synchronization procedures. This work focuses on the study of synchronization of sinusoidal signals, whose instantaneous frequency varies over time, through nonlinear feedback provided by a phase‐locked‐loop (PLL). The study of this behavior is done comparatively with a 3rd‐order PLL. We study the behavior of an analog PLL when making changes in the low‐pass filter in relation to the synchronization margins in the tracking and acquisition phases, the accuracy during the synchronized state and also the stability related to the delay of the phase of the modified filter. It also shows the limitation imposed by the phase delay of the filter on the stability of the PLL. We present a procedure to tune the basic low‐pass filter (LF) to optimize the behavior of the PLL. It first obtains the highest phase delay where PLL is stable. The phase delay is then used as a reference to design a filter to increase accuracy by eliminating the higher frequencies generated by the phase detector of the PLL.