Automatic Pipelining and Vectorization of Scientific Code for FPGAs. (18th November 2019)

• Record Type: Journal Article
• Authors: Nabi, Syed Waqar; Vanderbauwhede, Wim
• Other Names: Kalomiros John Academic Editor.
• Is Part Of: International journal of reconfigurable computing. Volume 2019(2019)
• Publication Date: 2019-11-18
• Subjects: Adaptive computing systems -- Periodicals; Adaptive computing systems; Periodicals; 004
• DOI: 10.1155/2019/7348013
• Languages: English
• ISSNs: 1687-7195

Abstract

Abstract : There is a large body of legacy scientific code in use today that could benefit from execution on accelerator devices like GPUs and FPGAs. Manual translation of such legacy code into device-specific parallel code requires significant manual effort and is a major obstacle to wider FPGA adoption. We are developing an automated optimizing compiler TyTra to overcome this obstacle. The TyTra flow aims to compile legacy Fortran code automatically for FPGA-based acceleration, while applying suitable optimizations. We present the flow with a focus on two key optimizations, automatic pipelining and vectorization . Our compiler frontend extracts patterns from legacy Fortran code that can be pipelined and vectorized. The backend first creates fine and coarse-grained pipelines and then automatically vectorizes both the memory access and the datapath based on a cost model, generating an OpenCL-HDL hybrid working solution for FPGA targets on the Amazon cloud. Our results show up to 4.2× performance improvement over baseline OpenCL code.