Effects of Area Ratio on the Characteristics of Metal-Ferroelectric-Metal-Insulator-Semiconductor Field-Effect-Transistors (MFMIS FETs). Issue 201 (2nd September 2019)

• Record Type: Journal Article
• Authors: Sun, Jing; Li, Yanping; Cao, Lei; Liu, Jiaoyun; Shi, Xiaorong; Tian, Li
• Is Part Of: Integrated ferroelectrics. Issue 201(2019)
• Page Start: 183
• Page End: 191
• Publication Date: 2019-09-02
• Subjects: Area ratio -- P-V characteristic -- C-V characteristic -- drain current -- MFMIS FETs; Ferroelectric devices -- Periodicals; Integrated circuits -- Periodicals; 537.244805
• DOI: 10.1080/10584587.2019.1668702
• Languages: English
• ISSNs: 1058-4587

Abstract

Abstract: The switching physics of ferroelectric, series capacitance theory and Pao and Sah's double integral are used for describing the polarization-voltage ( P - V ) characteristic of ferroelectric layer, capacitance-voltage ( C - V ) characteristic of MFMIS capacitor, and drain current-gate voltage ( I D - V GS ) and drain current-drain voltage ( I D - V DS ) characteristics of MFMIS FET. The effects of the area ratio on the P - V, C - V, I D - V GS, and I D - V DS characteristics are discussed. The results indicate that with the increase of the area ratio, the P - V characteristic, memory windows of C - V and I D - V GS characteristics become saturated, while the drain current ON/OFF ratio and applied voltage for saturated memory window decrease.