Algorithm design, software simulation and mathematical modelling of subthreshold leakage current in CMOS circuits. (21st November 2019)

• Record Type: Journal Article
• Authors: Mukherjee, Debasis; Reddy, B.V. Ramana
• Is Part Of: International journal of computational complexity and intelligent algorithms. Volume 1:Number 2(2019)
• Page Start: 129
• Page End: 144
• Publication Date: 2019-11-21
• Subjects: 20 nm -- bulk -- complementary metal oxide semiconductor -- CMOS -- device level -- leakage current -- MOSFET -- NMOS -- subthreshold -- technology computer-aided design -- TCAD -- very large scale integration -- VLSI; Computational complexity -- Periodicals; Heuristic algorithms -- Periodicals; Neural networks (Computer science) -- Periodicals; 006.3
• Languages: English
• ISSNs: 2048-4720

Abstract

In this paper, concepts of mathematics and computer science were applied to electronics engineering field, specifically very large scale integration (VLSI) design and semiconductor industry. Presently one of the major challenges faced by the semiconductor industry is continuously growing leakage current with technology scaling. Transistor is the smallest structural unit of any chip or semiconductor device. Subthreshold leakage current is known as one of the most dominant leakage current components of transistor. In this paper, mathematical relationship between transistor structure and subthreshold leakage current was found. An algorithm was designed for automatic tracking of the transistor structure. Simulation setup was formed by applying some mathematical formula on the outputs of the algorithm. Results of TCAD software simulation were found to be very close to a well known mathematical formula. As complementary metal oxide semiconductor (CMOS) is the most popular technology for semiconductor device fabrication in present days, the same was used for simulation purpose.