MEMS four-terminal variable capacitor for low power capacitive adiabatic logic with high logic state differentiation. (January 2019)

• Record Type: Journal Article
• Authors: Samaali, H.; Perrin, Y.; Galisultanov, A.; Fanet, H.; Pillonnet, G.; Basset, P.
• Is Part Of: Nano energy. Volume 55(2019)
• Page Start: 277
• Page End: 287
• Publication Date: 2019-01
• Subjects: Capacitive adiabatic logic -- Ultra low power circuits -- M/NEMS -- Capacitive logic gates -- Four terminal variable capacitor (FTCV); Nanoscience -- Periodicals; Nanotechnology -- Periodicals; Nanostructured materials -- Periodicals; Power resources -- Technological innovations -- Periodicals; Nanoscience; Nanostructured materials; Nanotechnology; Power resources -- Technological innovations; Periodicals; 621.042
• DOI: 10.1016/j.nanoen.2018.10.059
• Languages: English
• ISSNs: 2211-2855

Abstract

Abstract: This paper presents a novel four-terminal variable capacitor (FTVC) dedicated to the recent concept of low power capacitive adiabatic logic (CAL). This FTVC is based on silicon nano/micro technologies and is intended to achieve adiabatic logic functions with a better efficiency that by using field effect transistor (FET). The proposed FTVC consists of two capacitors mechanically coupled and electrically isolated, where a comb-drive input capacitor controls a gap-closing capacitor at the output. To fully implement the adiabatic combinational logic, we propose two types of variable capacitors: a positive variable capacitor (PVC) where the output capacitance value increases with the input voltage, and a negative variable capacitance (NVC) where the output capacitance value decreases when the input voltage increases. A compact and accurate electromechanical model has been developed. The electromechanical simulations demonstrate the ability of the proposed FTVC devices for CAL, with improved features such as high logic states differentiation larger than 50% of the full-scale input signal and cascability of both buffers and inverters. Based on the presented analysis, 89% of the total injected energy in the device can be recovered, the remaining energy being dissipated through mechanical damping. During one cycle of operation, a buffer gate of 10 × 2.5 µm 2 dissipates only 0.9 fJ . Graphic abstract: In this paper, we presented two novel four-terminal variable capacitors (FTVC) to be implemented in capacitive adiabatic logic (CAL). The proposed FTVC allow to drastically reduce the non-adiabatic dissipations associated to FET transistors. They are based on silicon nano/micro technologies and consists in two capacitors mechanically coupled and electrically isolated, where a comb-drive input capacitor controls a gap-closing capacitor at the output. We developed a complete electromechanical model of the FTVC that demonstrated the recovery of 89% of the injected energy and the cascade ability of the proposed FTVC devices for the CAL with a logic states differentiation as high as 55%.fx1 Highlights: We report a novel four-terminal variable capacitor (FTVC) dedicated to the capacitive adiabatic logic (CAL). The proposed FTVC has high logic states differentiation and cascability of both buffers and inverters. 89% of the total injected energy can be recovered and a buffer gate of 10 × 2.5 µm 2 dissipates only 0.9 fJ per cycle.