A novel VLSI design of radix-4 DFT in current mode. Issue 12 (2nd December 2019)

• Record Type: Journal Article
• Authors: Ganguly, A.; Chakraborty, A.; Banerjee, A.
• Is Part Of: International journal of electronics. Volume 106:Issue 12(2019)
• Page Start: 1845
• Page End: 1863
• Publication Date: 2019-12-02
• Subjects: OFDM -- fast Fourier transform (FFT) -- radix-4 algorithm -- decimation in frequency (DIF) -- cascode current mirror(CCM); Electronics -- Periodicals; Electronic control -- Periodicals; 621.381
• DOI: 10.1080/00207217.2019.1625972
• Languages: English
• ISSNs: 0020-7217

Abstract

ABSTRACT: Discrete-time Fourier transform (DFT) is viewed as an important tool in discrete time signal processing. Applications in wireless communication such as OFDM uses DFT/IDFT in its receiver and transmitter. For small battery powered wireless devices, discrete time analogue DFT can be very useful as a low-energy front-end. The quest for a reduction in the effect due to the mismatch of transistors lead to higher radix structure. It becomes very challenging for the designer to build an analogue circuit for implementation of DFT with radix sizes 4, 8, and so on. This is mainly because of hand calculation of circuit-level equations from butterfly algorithm becomes a long process. Thus, a design methodology becomes a necessary option in this regard. Here an algorithm is proposed for the generation of circuit-level equations leading to signal routing table for the circuit of basic radix-4 FFT. Following that algorithm, a current mode all analogue circuit with cascode current mirror is proposed. Simulations are carried out in SPICE using BSIM4 65 nm CMOS process. A mismatch noise model is also made to show the reduction in error with higher radix structure. The non-ideal effects due to mismatch in V th are analysed through Monte-Carlo simulation.