A graph-theoretic framework for analyzing the speeds and efficiencies of battery pack equalization circuits. (June 2018) - Chen, Yang; Liu, Xiaofang; Fathy, Hosam K.; Zou, Jiming; Yang, Shiyan
Highlights: A framework is presented to analyze the battery balancing circuits with digraph. This method can be applied to analyze both single and multi-layer structure. A quantitative comparison of different circuits on efficiency and speed is given. Abstract: This article presents a framework for analyzing the speeds and efficiencies of different battery pack balancing circuits. The article is motivated by the growing need for fast and efficient charge balancing in lithium-ion battery packs. There is an excellent literature on the design of different balancing circuits, including both single- and multi-layer active and passive topologies. However, this literature lacks a formal framework for representing different balancing circuits in a compact manner conducive to quantitative analysis. We address this challenge by representing the balancing pathways between different cells in a battery pack using a directed graph. This makes it possible to systematically analyze: (i) the "completeness" of a balancing circuit (the ability to address the imbalance between any two cells directly, even if they are not adjacent); (ii) the shortest path for balancing any two given cells; and (iii) the average efficiency of a balancing circuit for a statistical distribution of imbalance scenarios. The proposed framework is flexible: it can represent both single-layer and multi-layer balancing circuits, including circuits with multiple distinct types of converters. We demonstrate the capabilities of this framework through an example study involving the comparison of multiple balancing circuits for a 16-cell lithium-ion battery pack.