Electronic Devices and Circuits Based on Wafer‐Scale Polycrystalline Monolayer MoS2 by Chemical Vapor Deposition. (3rd June 2019)

• Record Type: Journal Article
• Authors: Wang, Lin; Chen, Li; Wong, Swee Liang; Huang, Xin; Liao, Wugang; Zhu, Chunxiang; Lim, Yee‐Fun; Li, Dabing; Liu, Xinke; Chi, Dongzhi; Ang, Kah‐Wee
• Is Part Of: Advanced Electronic Materials. Volume 5:Number 8(2019)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2019-06-03
• Subjects: chemical vapor deposition (CVD) -- integrated circuits -- memory -- MoS2 -- transistors; Materials -- Electric properties -- Periodicals; Materials science -- Periodicals; Magnetic materials -- Periodicals; Electronic apparatus and appliances -- Periodicals; 537
• DOI: 10.1002/aelm.201900393
• Languages: English
• ISSNs: 2199-160X

Abstract

Abstract: 2D layered materials such as graphene and transition‐metal dichalcogenides (TMDCs) have emerged as promising candidates for next‐generation nanoelectronic applications due to their atomically thin thicknesses and unique electronic properties. Among TMDCs, molybdenum disulfide (MoS2 ) has been extensively investigated as a channel material for field‐effect transistor (FET) and circuit realization. However, to date most reported works have been limited to exfoliated MoS2 nanosheets primarily due to the difficulty in synthesizing large‐area and high‐quality MoS2 thin film. A demonstration of wafer‐scale monolayer MoS2 synthesis is reported by chemical vapor deposition (CVD), enabling transistors, memristive memories, and integrated circuits to be realized simultaneously. Specifically, building on top‐gated FETs with a high‐κ gate dielectric (HfO2 ), Boolean logic circuits including inverters and NAND gates are successfully demonstrated using direct‐coupled FET logic technology, with typical inverters exhibiting a high voltage gain of 16, a large total noise margin of 0.72 V DD at V DD = 3 V, and perfect logic‐level matching. Additionally, resistive switching is demonstrated in a MoS2 ‐based memristor, indicating that they have great potential for the development of resistive random‐access memory. By virtue of scalable CVD growth capability, the way toward practical and large‐scale electronic applications of MoS2 is indicated. Abstract : Continuous wafer scale monolayer MoS2 is synthesized via chemical vapor deposition on a sapphire substrate. Electronic devices (transistors and memristors) and logic circuits (inverters and NAND gates) are demonstrated through a fabrication process fully compatible with existing Si technology. This work paves the way toward unleashing the potential of atomically thin MoS2 for practical and large‐scale electronics.