Towards AND/XOR balanced synthesis: Logic circuits rewriting with XOR. (February 2018) - Háleček, Ivo; Fišer, Petr; Schmidt, Jan
Abstract: Although contemporary logic synthesis performs well on random logic, it may produce subpar results in XOR-intensive circuits. This indicated the need of equal status of XORs and ANDs, with their respective Negation-Permutation-Negation (NPN) equivalents in logic synthesis procedures. To test the hypothesis of XOR importance, we introduced a novel logic representation with a native support of XOR gates, the XOR-AND-Inverter Graph (XAIG). As the first test, we implemented a rewriting algorithm in the logic synthesis and optimization package ABC and compared it with the standard rewriting algorithm based on the AND-Inverter Graph (AIG). The main experimental evaluation was performed in the context of a complete logic synthesis process, particularly the FPGA LUT mapping and mapping to standard cells. To eliminate algorithmic noise, input circuit descriptions were randomly modified while preserving their semantics. In the FPGA mapping, the XAIG rewriting dominated the AIG procedure in 8.6% of cases, while it was dominated in 1.6% of cases. For the standard cells mapping, the respective percentages were 3% and 1.5%. We conclude that the best rewriting is a combination of both approaches. Highlights: XOR-And-Inverter Graph (XAIG) introduced Rewriting algorithm based on XAIGs introduced and compared with standard AIG-based rewriting Different XOR node costs are assumed and compared. The results show that using XORs in logic synthesis in a balanced way is essential for obtaining good results.