Analysis and simulation of Single Electron Transistor as an analogue frequency doubler. (May 2018)

• Record Type: Journal Article
• Authors: Eskandarian, A.; Rajeyan, Z.; Ebrahimnezhad, H.
• Is Part Of: Microelectronics journal. Volume 75(2018)
• Page Start: 52
• Page End: 60
• Publication Date: 2018-05
• Subjects: Doubler -- Analogue -- Simulation -- Single Electron Transistor (SET) -- Macro model; Microelectronics -- Periodicals; Microélectronique -- Périodiques; Microelectronics; Electronic journals; Journals - contents and abstracts; Periodicals; 621.3805
• DOI: 10.1016/j.mejo.2018.02.008
• Languages: English
• ISSNs: 0959-8324

Abstract

Abstract: Performance of Single Electron Transistors as analogue frequency doublers is evaluated by analysis and HSPICE simulations. First, a macro model is selected which represents the device characteristics adequately. The model parameters are determined for different devices reported in the literature, based on their DC characteristics. Adding terminal capacitances to the device model, the small-signal AC performance of the transistors are then simulated. It is observed that the selected devices can operate up to GHz frequencies. Then large signal theory of operation of a common source doubler with resistive loading is developed based on the selected model. Simulations for resistor and transistor loaded circuits with HSPICE are also presented. There is good agreement between the simulation results and those from the closed form analytical expressions. The device analysis and simulations indicate that the device can be used as a doubler in its Coulomb blockade region of operation. Conversion gain (loss) of −13 dB, and harmonic distortion of 12% can be expected.