Parallel video processing on FPGA architecture. (5th July 2019)

• Record Type: Journal Article
• Authors: Touil, Lamjed; Abdelali, Abdessalem Ben; Kechiche, Lilia; Chaieb, Chiheb; Ouni, Bouraoui; Mtibaa, Abdellatif
• Is Part Of: International journal of high performance systems architecture. Volume 8:Number 3(2018)
• Page Start: 169
• Page End: 178
• Publication Date: 2019-07-05
• Subjects: FPGA -- multi-port memory controller -- MPMC -- video processing -- cut detection -- picture in picture; Computer architecture -- Periodicals; Computer systems -- Periodicals; High performance computing -- Periodicals; 004.205
• Languages: English
• ISSNs: 1751-6528

Abstract

Real-time video applications are becoming widely used in many domains with more demand for high performance. Video processing is intensive and habitually has accompanying real-time or super-real-time requirements. Such us, multiple cameras are used in monitoring and surveillance systems in automatically real-time analyse video to detect unusual events. Due to the strong computational imposed by video algorithms, real-time video treatment is notably amenable to concurrent processing. Classical implementation solutions whether based on general purpose processors or dedicated ones like DSP cannot fulfil wanted performance. In this article, we focus on the applicability of computing reconfigurable architectures to parallel video processing applications. The experiment results show that the proposed hardware-oriented multi-treatment architecture can provide an average frame rate of 45 frames/s at high definition resolution. Statistics show a consumption about 18% of logic resources and 27% of on chip memory which gives the possibility to integrate additional treatments.