Fast Discrete Fourier Transform Computations Using the Reduced Adder Graph Technique. (21st February 2007)

• Record Type: Journal Article
• Authors: Meyer-Bäse Meyer-Bäse, Uwe Uwe; Natarajan Natarajan, Hariharan Hariharan; Dempster Dempster, Andrew G. Andrew G.
• Other Names: Gu Gu Irene Y. H. Irene Y. H. Academic Editor.
• Is Part Of: EURASIP journal on advances in signal processing. Volume 2007(2007)
• Publication Date: 2007-02-21
• Subjects: Signal processing -- Periodicals; Traitement du signal; Signal processing; Periodicals; 621.3822
• DOI: 10.1155/2007/67360
• Languages: English
• ISSNs: 1687-6172

Abstract

Abstract : It has recently been shown that then -dimensional reduced adder graph (RAG-n ) technique is beneficial for many DSP applications such as for FIR and IIR filters, where multipliers can be grouped in multiplier blocks. This paper highlights the importance of DFT and FFT as DSP objects and also explores how the RAG-n technique can be applied to these algorithms. This RAG-n DFT will be shown to be of low complexity and possess an attractively regular VLSI data flow when implemented with the Rader DFT algorithm or the Bluestein chirp-z algorithm. ASIC synthesis data are provided and demonstrate the low complexity and high speed of the design when compared to other alternatives.