An Automated Fixed-Point Optimization Tool in MATLAB XSG/SynDSP Environment. (10th May 2011)

• Record Type: Journal Article
• Authors: Wang, Cheng C.; Shi, Changchun; Brodersen, Robert W.; Marković, Dejan
• Other Names: Yuan B. Academic Editor.
• Is Part Of: ISRN signal processing. Volume 2011(2011)
• Publication Date: 2011-05-10
• Subjects: Signal processing -- Periodicals; Signal processing; Periodicals; 621.3822
• DOI: 10.5402/2011/414293
• Languages: English
• ISSNs: 2090-5041

Abstract

Abstract : This paper presents an automated tool for floating-point to fixed-point conversion. The tool is based on previous work that was built in MATLAB/Simulink environment and Xilinx System Generator support. The tool is now extended to include Synplify DSP blocksets in a seamless way from the users' view point. In addition to FPGA area estimation, the tool now also includes ASIC area estimation for end-users who choose the ASIC flow. The tool minimizes hardware cost subject to mean-squared quantization error (MSE) constraints. To obtain more accurate ASIC area estimations with synthesized results, 3 performance levels are available to choose from, suitable for high-performance, typical, or low-power applications. The use of the tool is first illustrated on an FIR filter to achieve over 50% area savings for MSE specification of 10 −6 as compared to all 16-bit realization. More complex optimization results for chip-level designs are also demonstrated.