A performance analysis of the first generation of HPC‐optimized Arm processors. (6th February 2019)

• Record Type: Journal Article
• Authors: McIntosh‐Smith, Simon; Price, James; Deakin, Tom; Poenaru, Andrei
• Other Names: Thota Abhinav guestEditor.; He Yun guestEditor.; Hart David guestEditor.; Dahan Maytal guestEditor.; Navratil Paul guestEditor.
• Is Part Of: Concurrency and computation. Volume 31:Number 16(2019)
• Page Start: n/a
• Page End: n/a
• Publication Date: 2019-02-06
• Subjects: Arm -- benchmarking -- HPC -- ThunderX2 -- XC50; Parallel processing (Electronic computers) -- Periodicals; Parallel computers -- Periodicals; 004.35
• DOI: 10.1002/cpe.5110
• Languages: English
• ISSNs: 1532-0626

Abstract

Summary: In this paper, we present performance results from Isambard, the first production supercomputer to be based on Arm CPUs that have been optimized specifically for HPC. Isambard is the first Cray XC50 "Scout" system, combining Cavium ThunderX2 Arm‐based CPUs with Cray's Aries interconnect. The full Isambard system will be delivered in the summer of 2018, when it will contain over 10 000 Arm cores. In this work, we present node‐level performance results from eight early‐access nodes that were upgraded to B0 beta silicon in March 2018. We present node‐level benchmark results comparing ThunderX2 with mainstream CPUs, including Intel Skylake and Broadwell, as well as Xeon Phi. We focus on a range of applications and mini‐apps important to the UK national HPC service, ARCHER, as well as to the Isambard project partners and the wider HPC community. We also compare performance across three major software toolchains available for Arm: Cray's CCE, Arm's version of Clang/Flang/LLVM, and GNU.