A 0.6-V, 69-dB subthreshold sigma–delta modulator *Project supported by the National Natural Science Foundation of China (No. 61704143), the Natural Science Foundation of Fujian Province (No. 2018J01566), the Young and Middle-Aged Teacher Education Research Project of Fujian Province (No. JAT170428), and the High-Level Talent Project of Xiamen University of Technology (No. YKJ17019R). (December 2018) - Chen, Chengying; Zhang, Hongyi
Abstract: In this paper a 0.6 V, 14 bit/500 Hz subthreshold inverter-based sigma–delta modulator is proposed. In the first integrator of the modulator, a bootstrap switch is used to accomplish accurate signal sampling. Without a transconductor operational amplifier (OTA), the sigma–delta modulator adopts a cascode inverter in the subthreshold region to save power consumption. The modulator is fabricated with a 0.13 μ m CMOS mixed-signal process. The experiment results show that with the 0.6 V power supply it achieves a maximum SNDR of 69.7 dB and an ENOB of 11.3 bit, respectively, but only consumes 5.07 μ w power dissipation.