Symmetric complementary logic inverter using integrated black phosphorus and MoS2 transistors. (1st February 2016)

• Record Type: Journal Article
• Authors: Su, Yang; Kshirsagar, Chaitanya U; Robbins, Matthew C; Haratipour, Nazila; Koester, Steven J
• Is Part Of: 2D materials. Volume 3:Number 1(2016)
• Publication Date: 2016-02-01
• Subjects: black phosphorus -- inverter -- MoS2 -- transistor -- logic circuit -- CMOS; Graphene -- Periodicals; Materials science -- Periodicals; Nanostructured materials -- Periodicals; 620.115
• DOI: 10.1088/2053-1583/3/1/011006
• Languages: English
• ISSNs: 2053-1583

Abstract

Abstract: The operation of an integrated two-dimensional complementary metal–oxide–semiconductor inverter with well-matched input/output voltages is reported. The circuit combines a few-layer MoS2 n-MOSFET and a black phosphorus (BP) p-MOSFET fabricated using a common local backgate electrode with thin (20 nm) HfO2 gate dielectric. The constituent devices have linear threshold voltages of −0.8 V and +0.8 V and produce peak transconductances of 16 μ S μ m −1 and 41 μ S μ m −1 for the MoS2 n-MOSFET and BP p-MOSFET, respectively. The inverter shows a voltage gain of 3.5 at a supply voltage, V DD = 2.5 V, and has peak switching current of 108 μ A and off-state current of 8.4 μ A (2.4 μ A) at V IN = 0 ( V IN = 2.5 V). In addition, the inverter has voltage gain greater than unity for V DD ≥ 0.5 V, has open butterfly curves for V DD ≥ 1 V, and achieves static noise margin over 500 mV at V DD = 2.5 V. The voltage gain was found to be insensitive to temperature between 270 and 340 K, and AC large and small-signal operation was demonstrated at frequencies up to 100 kHz. The demonstration of a complementary 2D inverter which operates in a symmetric voltage window suitable for driving a subsequent logic stage is a significant step forward in developing practical applications for devices based upon 2D materials.