ASPIC and CABAC: two ASICs to readout and pilot CCD. (6th March 2017) - Antilogus, P.; Bailly, P.; Barrillon, P.; Dhellot, M.; berni, A. El; Jeglot, J.; Juramy-Gilles, C.; Lebbolo, H.; Martin, D.; Moniez, M.; Vallerand, P.
Abstract: For several years, a group of engineers and physicists from LAL and LPNHE have been working on the design of two front end ASICs dedicated to Charge Couple Devices (CCD). ASPIC (Analogue Signal Processing Integrated Circuit), designed in AMS CMOS 0.35 μ m 5V technology, is meant to readout and process the analog signals of CCDs. CABAC (Clocks And Biases ASIC for CCDs), designed in AMS CMOS 0.35 μ m 50V technology, produces the clocks and biases needed by the CCDs to work at their full potential. This paper presents the performances of the final versions of these two ASICs.