Analysis and design of an integrated RF energy harvester for ultra low‐power environments. (16th May 2019)

• Record Type: Journal Article
• Authors: Caselli, Michele; Tonelli, Matteo; Boni, Andrea
• Is Part Of: International journal of circuit theory and applications. Volume 47:Number 7(2019)
• Page Start: 1086
• Page End: 1104
• Publication Date: 2019-05-16
• Subjects: analog integrated circuits -- circuit modeling -- circuit analysis -- RF energy harvesting -- UHF measurements -- ultra low‐power environments; Electric circuit analysis -- Periodicals; 621.319205
• DOI: 10.1002/cta.2637
• Languages: English
• ISSNs: 0098-9886

Abstract

Summary: Radio‐frequency (RF) energy harvesting must cope with the limited availability and high variability of the energy source. In this paper, the available RF power in three typical environments (urban, semi‐urban, and rural) is investigated. Measurements show that in the surveyed urban and semi‐urban environments, an average input power above −22 and −29 dBm, respectively, is available in the [700, 1, 000] MHz band. A mathematical model of the interface between the RF rectifier and the DC‐DC converter is provided. The analysis demonstrates that the energy can be efficiently transferred to the external accumulator coupling the rectifier with a strobed, input control DC‐DC converter. Based on the measurements and the analysis, an RF harvester architecture has been designed in 65 nm Complementary Metal‐Oxide Semiconductor (CMOS) technology to operate over the [−40, 85] o C temperature and the [1.1, 2.5] V battery voltage ranges. The input control strategy adopted for the converter allows the adaptation of the harvester to the available RF power and enables a real maximum power point tracking (MPPT). Post‐layout simulation of the harvester, recharging a large capacitor, precharged at 2 V, at 950 MHz of input frequency returned a 33.4% peak efficiency with an input power of 15 μ W (−18 dBm). The minimum input power leading to a positive energy balance is −30 dBm with an output voltage of 1.1 V. Abstract : In this paper, we investigate the RF power available in three typical environments, and we propose and analyse a harvester architecture for ultra‐low power environments composed of an RF rectifier and an input controlled DC‐DC converter. The RF harvester architecture has been designed in 65‐nm CMOS technology to operate over the [−40, 85]°C temperature and the [1.1, 2.5] V battery voltage ranges. Post layout simulations at 950 MHz of input frequency returned a 33.4% peak efficiency at an RF input power of −18 dBm and a minimum input power leading to a positive energy balance of −30 dBm at 1.1‐V output voltage.