Analysis of noise generation and electric conduction at grain boundaries in CVD-grown MoS2 field effect transistors. (26th October 2017) - Kim, Jae-Keun; Song, Younggul; Kim, Tae-Young; Cho, Kyungjune; Pak, Jinsu; Choi, Barbara Yuri; Shin, Jiwon; Chung, Seungjun; Lee, Takhee
Abstract: Grain boundaries in a chemical vapour deposition (CVD)-grown monolayer of MoS2 induce significant effects on the electrical and low frequency noise characteristics of the MoS2 . Here, we investigated the electrical properties and noise characteristics of MoS2 field effect transistors (FETs) made with CVD-grown monolayer MoS2 . The electrical and noise characteristics of MoS2 FETs were analysed and compared for the MoS2 channel layers with and without grain boundaries. The grain boundary in the CVD-grown MoS2 FETs can be the dominant noise source, and dependence of the extracted Hooge parameters on the gate voltage indicated the domination of the correlated number-mobility fluctuation at the grain boundaries. The percolative noise characteristics of the single grain regions of MoS2 were concealed by the noise generated at the grain boundary. This study can enhance understanding of the electrical transport hindrance and significant noise generation by trapped charges at grain boundaries of the CVD-grown MoS2 devices.