TCAD modeling for reliability. (September 2018) - Pfäffli, P.; Wong, H.Y.; Xu, X.; Silvestri, L.; Lin, X.W.; Yang, T.; Tiwari, R.; Mahapatra, S.; Motzny, S.; Moroz, V.; Ma, T.
Abstract: Technology Computer Aided Design (TCAD) tools can be used to effectively study and analyze a multitude of reliability issues in semiconductor devices. In the following article, we first describe Negative-Bias Temperature Instability (NBTI), which is one of the most severe reliability issues. Using the Reaction-Diffusion (RD) model for simulating the NBTI effect, we show that the simulated threshold voltage degradation agrees well with measured data. Based on the simulation results, we propose an on-chip heater to enhance recovery and revert the NBTI degradation. Next, we discuss how to apply the Hot-Carrier Stress (HCS) model to analyze hot carrier degradation in FinFET. We show that the threshold voltage shift agrees well with experiment and use the HCS model for the simulation of breakdown voltage walkout in a LDMOS transistor. Then, we apply process emulation to better understand modern DRAM structures and illustrate the row hammering reliability issue. Finally, we demonstrate a multi-level sub-modeling methodology for chip to package interaction (CPI) and apply the method to study the effect of wafer bending on the reliability of re-distribution layers (RDL). Highlights: TCAD simulations are necessary for the understanding of reliability issues. NBTI and hot-carrier degradation is analyzed with Sentaurus Device. The row hammer effect in DRAM is illustrated with Process Explorer. Chip-package interactions and thermo-mechanical reliability issues are studied with Sentaurus Interconnect.