3D integrated superconducting qubits. (December 2017) - Rosenberg, D.; Kim, D.; Das, R.; Yost, D.; Gustavsson, S.; Hover, D.; Krantz, P.; Melville, A.; Racz, L.; Samach, G.; Weber, S.; Yan, F.; et al.
Abstract As the field of quantum computing advances from the few-qubit stage to larger-scale processors, qubit addressability and extensibility will necessitate the use of 3D integration and packaging. While 3D integration is well-developed for commercial electronics, relatively little work has been performed to determine its compatibility with high-coherence solid-state qubits. Of particular concern, qubit coherence times can be suppressed by the requisite processing steps and close proximity of another chip. In this work, we use a flip-chip process to bond a chip with superconducting flux qubits to another chip containing structures for qubit readout and control. We demonstrate that high qubit coherence (T 1, T 2, echo > 20 μs) is maintained in a flip-chip geometry in the presence of galvanic, capacitive, and inductive coupling between the chips. Addressing qubits in a large-scale quantum processor Superconducting qubits are a leading technology for realizing a quantum computer. To date, experiments have demonstrated control of up to ten qubits using interconnects that laterally address the qubits from the edge of a chip. Extending to larger numbers, however, will require utilizing the third dimension to avoid interconnect crowding and enable control and readout of all qubits in a two-dimensional array. Danna Rosenberg and a team led by William D. Oliver at MIT Lincoln Laboratory and MIT campus have developed a 3D design for efficiently addressing large numbers of qubits, comprising a stack of three bonded chips, each of which performs a different function. The team performed a proof-of-principle experiment using two bonded chips, demonstrating off-chip control and read out of a qubit without significantly impacting the quality of the qubit performance. This demonstration is an important step towards the 3D integration required to build larger-scale devices for quantum information processing.