Parallel Backprojection: A Case Study in High-Performance Reconfigurable Computing. (8th February 2009)

• Record Type: Journal Article
• Authors: Cordes, Ben; Leeser, Miriam
• Other Names: Sriram Vinay Academic Editor.
• Is Part Of: EURASIP journal on embedded systems. Volume 2009(2009)
• Publication Date: 2009-02-08
• Subjects: Embedded computer systems -- Periodicals; Systèmes enfouis (Informatique); Embedded computer systems; Periodicals; Electronic journals; 006.22
• DOI: 10.1155/2009/727965
• Languages: English
• ISSNs: 1687-3955

Abstract

Abstract : High-performance reconfigurable computing (HPRC) is a novel approach to provide large-scale computing power to modern scientific applications. Using both general-purpose processors and FPGAs allows application designers to exploit fine-grained and coarse-grained parallelism, achieving high degrees of speedup. One scientific application that benefits from this technique is backprojection, an image formation algorithm that can be used as part of a synthetic aperture radar (SAR) processing system. We present an implementation of backprojection for SAR on an HPRC system. Using simulated data taken at a variety of ranges, our implementation runs over 200 times faster than a similar software program, with an overall application speedup better than 50x. The backprojection application is easily parallelizable, achieving near-linear speedup when run on multiple nodes of a clustered HPRC system. The results presented can be applied to other systems and other algorithms with similar characteristics.