An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction. (15th September 2009)

• Record Type: Journal Article
• Authors: Gu, Ji; Guo, Hui
• Other Names: Nunez Antonio Academic Editor.
• Is Part Of: EURASIP journal on embedded systems. Volume 2009(2009)
• Publication Date: 2009-09-15
• Subjects: Embedded computer systems -- Periodicals; Systèmes enfouis (Informatique); Embedded computer systems; Periodicals; Electronic journals; 006.22
• DOI: 10.1155/2009/973976
• Languages: English
• ISSNs: 1687-3955

Abstract

Abstract : This paper presents a bus coding methodology for the instruction memory data bus switching reduction. Compared to the existing state-of-the-art multiway partial bus-invert (MPBI) coding which relies on data bit correlation, our approach is very effective in reducing the switching activity of the instruction data buses, since little bit correlation can be observed in the instruction data. Our experiments demonstrate that the proposed encoding can reduce up to 42% of switching activity, with an average of 30% reduction, while MPBI achieves just 17.6% reduction in switching activity.