Fabrication of Self-Aligned Graphene FETs with Low Fringing Capacitance and Series Resistance. (12th September 2012)

• Record Type: Journal Article
• Authors: Wang, Yanjie; Huang, Bo-Chao; Zhang, Ming; Miao, Congqin; Xie, Ya-Hong; Woo, Jason C. S.
• Other Names: Belostotski L. Academic Editor.; Solsona J. Academic Editor.; Tlelo-Cuautle E. Academic Editor.
• Is Part Of: ISRN electronics. Volume 2012(2012)
• Publication Date: 2012-09-12
• Subjects: Electronics -- Periodicals; Electronics; Electronic journals; Periodicals; 621.381
• DOI: 10.5402/2012/891480
• Languages: English
• ISSNs: 2090-8679

Abstract

Abstract : Graphene FETs with top-gate and buried-gate structure has been studied. The buried-gate structure shows less fringing capacitance and more reliable contacts. High-performance graphene transistors with self-aligned buried gates have been fabricated. The graphene transistor shows field-effect mobility of over 6, 000 cm 2 /V · s according to the transconductance measurement. The contact resistance and intrinsic mobility have been extracted from both curve fitting and transfer length measurement, and the two results agree well. This result paves the way of high-quality graphene transistor technology for the RF application.