Transformation of Holes Emission Paths under Negative Bias Temperature Stress in Deeply Scaled pMOSFETs. (27th April 2015) - Liao, Yiming; Ji, Xiaoli; Guo, Qiang; Yan, Feng
Abstract : We examine the impact of negative bias temperature (NBT) stress on the fluctuations inI D andI G for deeply scaled pMOSFETs and find that the relative high NBT stress triggersI G -RTN andI D -step. Through the analysis of the field dependence of emission constant and the carrier separation measurement, it is found that under the relative high NBT stress some traps keep charged state for very long time, as observing step-like behaviors inI D, while other traps emit charged holes to the gate side through TAT process, which originate bothI D -step and ID-RTN.