A Dynamically Reconfigured Multi-FPGA Network Platform for High-Speed Malware Collection. (9th November 2011)

• Record Type: Journal Article
• Authors: Mühlbach, Sascha; Koch, Andreas
• Other Names: Santambrogio Marco D. Academic Editor.
• Is Part Of: International journal of reconfigurable computing. Volume 2012(2012)
• Publication Date: 2011-11-09
• Subjects: Adaptive computing systems -- Periodicals; Adaptive computing systems; Periodicals; 004
• DOI: 10.1155/2012/342625
• Languages: English
• ISSNs: 1687-7195

Abstract

Abstract : Malicious software has become a major threat to computer users on the Internet today. Security researchers need to gather and analyze large sample sets to develop effective countermeasures. The setting of honeypots, which emulate vulnerable applications, is one method to collect attack code. We have proposed a dedicated hardware architecture for honeypots which allows both high-speed operation at 10 Gb/s and beyond and offers a high resilience against attacks on the honeypot infrastructure itself. In this work, we refine the base NetStage architecture for better management and scalability. Using dynamic partial reconfiguration, we can now update the functionality of the honeypot during operation. To allow the operation of a larger number of vulnerability emulation handlers, the initial single-device architecture is extended to scalable multichip systems. We describe the technical aspects of these modifications and show results evaluating an implementation on a current quad-FPGA reconfigurable computing platform.